SD Progress

I’ve found it difficult to find a 100% complete picture of the SD Card SPI protocool.  However, this is what I’ve pieced together and has managed to allow me to communicate with a Sandisk card I had sitting around.  Overall progress has been slow as I’ve been occupied with other important things.  I have however managed to squash the bug that turned my data line into an oscillator and have successfully read the contents of the OCR register.  So, although it’s been slow there has been progress and I expect to be able to pick up the pace again now that things have settled and I’m transitioning back into school.

SD Command Packet

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SPI and SD Cards

Over the past week I’ve been working on communicating with an SD Card using my custom SPI Controller. I’ve uncovered some bugs in the controller and begun having some success in communicating with the SD Card. A combination of unique SD Card behavior and a clock phasing bug meant I spent far too long debugging an unresponsive SD Card in the beginning stages of experimentation. Unlike a lot of the signal captures I’ve found online the SD Card I’m working with does not drive the DAT0 line high until it receives a valid CMD0 packet. My protocol analyzer was indicating that the packet I was sending out was a valid CMD0 yet nothing I did received any response from the SD Card. After lengthy debugging I looked closer at the serial data bus and found that my clock phasing was actually inverted. With the clock phasing fixed the SD Card now Drives high and responds with the expected idle response (0x01).

Aside from the bug fixes I’ve added the ability to trigger a single byte transfer from the SPI controller.  This makes it much easier to prepare a data byte and send it out by removing the necessity to determine when the controller is going to poll the input bus.  It’s still a bit cumbersome as I was unable to get my intended design to synthesize.  I haven’t yet gotten a complete grasp on the details of the VHDL to hardware process which leads to some hiccups, but the code I have now is enough to establish communication. My current work is on another bug which is likely in the SPI Controller portion of my circuit. After receiving a card ready response (0x00) the MISO line turns into a 12kHz clock and the SD card loses synchronization.

FPGA: SPI Controller

The Serial Peripheral Interface (SPI) Bus is a full duplex synchronous serial communication standard. SPI is common in embedded applications due to it’s high throughput and relatively simple interface. This is a simple SPI controller implementation with an 8 bit word length and a single slave select line.

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