Of Simulation and Synthesis

I’ve made significant progress on my 6502 FPGA Emulation, and even have a mostly complete layout of the NES Picture Processing Unit.  I set up a test-bench that included RAM and cartridge simulation and logged the processor output to a text file that could be compared to the “golden” nestest log.  I was able to debug all of the documented instructions and had begun to implement some of the undocumented instructions when I decided to try and load the processor into my FPGA. Unfortunately, this is where I learned that just because something can be simulated doesn’t mean it can be synthesized.

Log Comparison

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