There’s an amazing project known as Visual 6502. They have created a transistor level net-list of the 6502 processor which can in turn be converted into synthesizable VHDL. As nice as this is, I’ve decided that would be far too easy and am going to go ahead and emulate the 6502 core before I fool around with a proper simulation. I’ve already poured through the available documents and laid out a framework for my emulation. The capture below is the first result from that process. That is the emulator executing the opcode 0×01 (Inderect X indexed OR with the accumulator) The A register isn’t actually visable but the processor is successfully loading the data from my simulated ROM and jumping to the correct memory locations based on the code I’ve provided. There is still a long way to go before the process is complete, but it is well on its way.