Monthly Archive: August 2012

Aug 25

SPI and SD Cards

Invalid MOSI

Over the past week I’ve been working on communicating with an SD Card using my custom SPI Controller. I’ve uncovered some bugs in the controller and begun having some success in communicating with the SD Card. A combination of unique SD Card behavior and a clock phasing bug meant I spent far too long debugging …

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Aug 19

FPGA: SPI Controller

SPI_Controller Screenshot

The Serial Peripheral Interface (SPI) Bus is a full duplex synchronous serial communication standard. SPI is common in embedded applications due to it’s high throughput and relatively simple interface. This is a simple SPI controller implementation with an 8 bit word length and a single slave select line.

Aug 14

FPGA NES: VGA (Part 3)

P1040753

A video engineer, or really anybody who cares, would tell you that I’ve created a pretty inaccurate representation of the SMPTE color bar test pattern. As I’m not actually trying to calibrate any monitors I don’t fall into this category. I’ve modeled my test screen off of the Wikipedia description of SMPTE color bars. This …

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Aug 09

FPGA: 4 Bit Counter

Altium 8 Bit Converter Schematic

The heart of the VGA controller described in previous articles is a modified binary counter. The VHDL code provided below is a simple 4 bit counter with clock enable and reset inputs. The  4BitCounter_Test file provides a testbench to stimulate the counter and verify it’s operation. A counter can also be implemented as an altium …

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Aug 08

FPGA NES: VGA (Part 2)

P1040737

Previously a basic VGA controller was designed that had the capability to display a solid color across an entire computer monitor. This post builds on that design in an attempt to verify that the controller is able to correctly display more advanced patterns. In this example the code for the clock sub-circuit remained unchanged. However …

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